The School of Electrical and Electronic Engineering recently hosted a landmark hands-on chip design workshop bringing together students from across the UK to design and submit their own microchips for fabrication. The initiative was supported by EnSilica and a group of semiconductor industry sponsors.
Delivered using the Tiny Tapeout framework – an open-source, multi-project wafer (MPW) approach that enables low-cost fabrication of application-specific integrated circuit (ASIC) designs – the workshop enabled more than 120 students from 10 universities to progress from initial concept through to chip design and tapeout within a single afternoon. The programme is believed to be the largest Tiny Tapeout workshop and mass tapeout cohort to date globally.
Open to students with no prior experience, the workshop introduced participants to digital logic fundamentals before guiding them through the full process of preparing a design for silicon. Each student was able to submit their own design as part of a shared fabrication run, with chips now heading to manufacture. Participants are expected to return later in the year to test their designs on real silicon.
The initiative highlights a growing challenge for the UK semiconductor sector: a critical skills and generational gap, driven by increasing demand for chip design expertise and an ageing workforce. At the same time, limited access to EDA tools and fabrication has historically restricted opportunities for students to gain practical experience.
By combining open-source design tools with a multi-project wafer (MPW) approach, Tiny Tapeout enables groups of students to access real silicon at lower cost – helping to make chip design more accessible and providing practical experience beyond traditional teaching.
The workshop was supported by Sheffield Hardware and Reconfigurable Computing (SHaRC), whose student-led community played a key role in delivery and scaling participation.
Dr Mohammad Eissa, workshop organiser and academic lead for SHaRC at the University of Sheffield, said: “This initiative shows what is possible when academia, students and industry come together to remove barriers to chip design. Giving students the opportunity to take a design all the way to silicon is incredibly powerful, but just as importantly, it helps raise awareness. Many students don’t initially consider semiconductors as a career path, and experiences like this can fundamentally change that.”
Ian Lankshear, CEO of EnSilica, said: “The UK semiconductor sector faces a well-documented skills shortage, and increasing the number of engineers with practical design experience is critical. Supporting initiatives like this helps bridge the gap between theory and real-world application, while inspiring more students to explore careers in chip design.”
The event forms part of wider UK efforts to strengthen the semiconductor talent pipeline, alongside initiatives led by UK Electronics Skills Foundation (UKESF), which focus on engaging students earlier and building awareness of opportunities in the sector.
Industry sponsors – including EnSilica, GarField Microelectronics (GFMicro), Novomorphic, UK Electronics Skills Foundation (UKESF), and CHIMES – provided support to ensure every participant could submit their own design as part of the shared tapeout.
By providing hands-on ASIC design experience at scale, the workshop supports efforts to address the UK’s shortage of industry-ready chip designers and highlights the role accessible, practical initiatives can play in developing the future semiconductor workforce, with scope for similar programmes to follow.